High frequency/high gain receiver systems are used in a myriad of applications. For example, digital data communication equipment typically includes a high frequency/high gain frequency shift keying (FSK) receiver. Digital data is received and demodulated as understood. Sometimes the transmitted digital data can become distorted through intermediate stages of the receiver such that the square wave digital data is shaped more like a sine wave. If this is the case, the data must be reshaped, for example, by a data slicer, in order to obtain useful bits of information.
Prior art data slicer/shaper circuits have utilized comparators to square up the data bits. However, in some receivers, for example FSK receivers, the direct current (DC) level of the data signal can drift away from the reference voltage of the comparator. This can be resolved by alternating current (AC) coupling, but then the circuit can no longer handle long strings of bits of one polarity.
This problem was solved in one prior art wide band FSK receiver, the MC3356 receiver manufactured by Motorola, Inc., using back to back clamping diodes across the inputs of a floating comparator. The MC3356 utilized a diode clamp comparator where DC drifts were taken up by a capacitor whose charging and discharging was controlled by the diodes. In time division duplex (TDD) systems, however, the receiver (during transmit mode) is receiving a quite different signal which can re-bias the capacitor so that in returning to the receive mode the data slicer may miss the first few bits before the capacitor recovers. Moreover, although the MC3356 back to back diode scheme works well with large input signals and sufficient power supply voltages, it can not be used with low power supply voltages and low signal levels due to the bias requirement of the two back to back diodes.
Hence, there exists a need for an improved data slicer that can be utilized with reduced data input signals and time division duplex systems.